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Branch predictor
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81	Int. J. of Computers, Communications & Control, ISSN[removed], E-ISSN[removed]Vol. IV (2009), No. 1, pp[removed]The Impact of Java Applications at Microarchitectural Level from Branch Prediction Perspective Adrian Flor Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2009-01-17 04:18:56 Central processing unit Branch predictor Software optimization Computing platforms CPU cache Standard Performance Evaluation Corporation Java Benchmark Profiling Computing Cross-platform software Java platform
82	MINISTERUL EDUCATIEI SI CERCETARII Universitatea “POLITEHNICA” Bucuresti Spl. Independentei, 313, Sector 6, Cod[removed], Bucuresti Tel: +[removed]Facultatea de Automatica si Calculatoare Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2005-12-13 09:40:43 Central processing unit Branch predictor Machine code CPU cache Indirect branch Profiling Subroutine Microarchitecture Prediction Computer architecture Computing Computer hardware
83	A NEW BRANCH PREDICTION APPROACH USING NEURAL NETWORKS Lucian N. VINTAN, Adrian FLOREA, Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2010-05-17 01:48:52 Science Multilayer perceptron Prediction Cybernetics Knowledge Branch predictor Neural networks Computational neuroscience
84	BRANCH PREDICTION: A CRITICISM AND A NOVEL SCHEME Lucian N. VINTAN, Adrian FLOREA “L. Blaga” University of Sibiu, Department of Computer Science, Str. E. Cioran, No. 4, Sibiu-2400, ROMANIA, E-mail: [removed] Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2010-05-17 01:48:52 Computer engineering Branch predictor CPU cache Prediction Branch misprediction RSA Microarchitecture Computer architecture Computer hardware Central processing unit
85	Microsoft Word - Unb_Br_Book.doc Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2008-04-11 10:32:50 Branch predictor Central processing unit Alpha 21264 Prediction Branch misprediction Microarchitecture Computer architecture Computer hardware Computer engineering
86	060-computer-Geller[removed] Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2007-12-05 00:43:29 Central processing unit CPU cache Cache Computer memory Branch predictor Microarchitecture Parallel computing Superscalar Instruction-level parallelism Computer architecture Computer hardware Computer engineering
87	059-computer-Florea[removed] Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2007-12-05 00:43:29 Central processing unit Computer memory Runahead CPU cache Microarchitecture Memory-level parallelism Parallel computing Branch predictor Instruction set Computer architecture Computer hardware Computer engineering
88	A VISUAL SIMULATION FRAMEWORK FOR SIMULTANEOUS MULTITHREADING ARCHITECTURES Adrian Florea1, Alexandru Ratiu1, Arpad Gellert1 and Lucian N. Vinţan1,2 1 Computer Engineering Department, “Lucian Blaga” University of S Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2011-07-24 18:09:27 Central processing unit Parallel computing Microprocessors Threads Superscalar Simultaneous multithreading Branch predictor Microarchitecture Multithreading Computer architecture Computing Computer hardware
89	STATIC AND DYNAMIC BRANCH PREDICTION USING NEURAL NETWORKS Marius SBERA, Lucian N. VINTAN, Adrian FLOREA* * “S.C. Consultens Informationstechnik S.R.L.” Sibiu, ROMANIA, E-mail: [removed] “Lucian Blaga Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2010-05-17 01:48:51** Science Computational statistics Cybernetics Computing Artificial neural network Trace scheduling Prediction Central processing unit Alpha 21264 Computational neuroscience Neural networks Branch predictor
90	PRE-COMPUTED BRANCH “PREDICTION” Lucian N. VINTAN, Marius SBERA, Adrian FLOREA * “Lucian Blaga” University of Sibiu, Computer Science Department, Sibiu, ROMANIA E-mail: [removed], aflorea@vectr Add to Reading List Source URL: webspace.ulbsibiu.ro Language: English - Date: 2010-05-17 01:48:51 Central processing unit Branch predictor Assembly languages Hazard Branch misprediction CPU cache Instruction set Delay slot Addressing mode Computer architecture Computer hardware Computer engineering